FIG. 27 is a block diagram showing the composition of a scanner image processing circuit in a conventional image processing apparatus. As an image reading device, an optical element such as a CCD 2010 or CIS 2110 is used. Data according to a predetermined output format is A/D-converted by a CCD interface (I/F) circuit 2000 or CIS interface (I/F) circuit 2100 and stored in a main memory 2200 for each line in the main scanning direction. In this case, the CCD 2010 outputs data corresponding to R, G, and B in parallel. The CIS 2110 serially outputs the signals of R, G, and B data in accordance with the order of LED lighting. Depending on different output data characteristics, the CCD and CIS have dedicated interface circuits. After predetermined A/D conversion processing, the read image data is stored in the main memory (SDRAM) 2200.
Referring to FIG. 27, image processing blocks (shading correction (SHD) 2300, character determination processing 2320, filter processing 2340, and the like) have dedicated line buffers 2400a to 2400d. In this circuit composition, data corresponding to a plurality of lines, which are stored in the main memory (SDRAM) 2200, are read out in the main scanning direction, stored in the dedicated line buffers (2400a to 2400d), and subjected to individual image processing operations.
However, in the circuit composition that prepares dedicated line buffers 2400a to 2400d for the respective processing sections, the maximum number of pixels that can be processed in the main scanning direction depends on the memory capacity of the dedicated line buffer of each processing section. This restricts the throughput of processing.
If the capacity of the line buffer is increased in the hardware configuration of the image processing circuit to improve the processing capability, the cost increases. This impedes cost reduction of the entire image processing apparatus. For example, when the resolution or main scanning width of the apparatus should be increased, the capacity of the line buffer must be increased.
A signal output from the CCD 2010 or CIS 2110 serving as an image reading device is processed by the dedicated interface circuit (2000 or 2100) in accordance with the output format. Bitmapping of read image data on the main memory 2200 depends on which device (e.g., the CCD or CIS) has been used, and image data input processing must inevitably be specialized. That is, the image processing circuit is customized depending on the employed image reading device. This impedes generalization and cost reduction of the image processing circuit.
A prior art having the above composition is disclosed in, e.g., Japanese Patent Laid-Open No. 7-170372.